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| PRELIMINARY Integrated Circuit Systems, Inc. ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT FEATURES * Complementary LVCMOS / LVTTL output * LVCMOS / LVTTL clock input accepts LVCMOS or LVTTL input levels * Maximum output frequency: 250MHz * Output skew: 165ps (maximum) * Part-to-part skew: 800ps (maximum) * Small 8 lead SOIC package saves board space * Full 3.3V or 3.3V core/2.5V output supply modes * -40C to 85C ambient operating temperature GENERAL DESCRIPTION T h e I C S 8 3 0 2I-01 i s a l ow s kew, 1 - t o - 2 LVCMOS/LVTTL Fanout Buffer w/ComplemenHiPerClockSTM tary Output and a member of the HiPerClockSTM family of High Performance Clock Solutions from ICS. The ICS8302I-01 has a single ended clock input. The single ended clock input accepts LVCMOS or LVTTL input levels. The ICS8302I-01 is characterized at full 3.3V for input VDD, and mixed 3.3V and 2.5V for output operating supply modes (VDDO). Guaranteed output and partto-par t skew characteristics make the ICS8302I-01 ideal for clock distribution applications demanding well defined performance and repeatability. ICS BLOCK DIAGRAM Q CLK nQ PIN ASSIGNMENT VDDO VDD CLK GND 1 2 3 4 8 7 6 5 Q GND VDDO nQ ICS8302I-01 8-Lead SOIC 3.8mm x 4.8mm, x 1.47mm package body M Package Top View The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 8302AMI-01 www.icst.com/products/hiperclocks.html REV. A DECEMBER 2, 2003 1 PRELIMINARY Integrated Circuit Systems, Inc. ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT Type Description Output supply pins. Core supply pin. Pulldown LVCMOS / LVTTL clock input. Power supply ground. Complementary clock output. LVCMOS / LVTTL interface levels. Clock output. LVCMOS / LVTTL interface levels. TABLE 1. PIN DESCRIPTIONS Number 1, 6 2 3 4,7 5 8 Name VDDO VDD CLK GND nQ Q Power Power Input Power Output Output NOTE: Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN CPD RPULLDOWN ROUT Parameter Input Capacitance Power Dissipation Capacitance (per output) Input Pulldown Resistor Output Impedance 5 VDD, VDDO = 3.465V VDD = 3.465V, VDDO = 2.625V Test Conditions Minimum Typical 4 22 16 51 7 12 Maximum Units pF pF pF K 8302AMI-01 www.icst.com/products/hiperclocks.html 2 REV. A DECEMBER 2, 2003 PRELIMINARY Integrated Circuit Systems, Inc. ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT 4.6V -0.5V to VDD + 0.5 V -0.5V to VDDO + 0.5V 112.7C/W (0 lfpm) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 3.3V5% OR 2.5V5%, TA = -40C TO 85C Symbol VDD VDDO IDD IDDO Parameter Core Supply Voltage Output Power Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 3.135 3.135 2.375 Typical 3.3 3.3 2.5 Maximum 3.465 3.465 2.625 13 4 Units V V V mA mA TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 3.3V5% OR 2.5V5%, TA = -40C TO 85C Symbol VIH VIL IIH IIL Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current CLK CLK VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V VDDO = 3.465, 50 to VDDO/2 VOH Output High Voltage VDDO = 3.465, IOH = -100A VDDO = 2.625, 50 to VDDO/2 VDDO = 2.625, IOH = -100A VDDO = 3.465, 50 to VDDO/2 VOL Output Low Voltage VDDO = 3.465, IOL = 100A VDDO = 2.625, 50 to VDDO/2 VDDO = 2.625, IOL = 100A -5 2.6 2.9 1.8 2.2 0.5 0.2 0.5 0.2 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 1.3 150 Units V V A A V V V V V V V V 8302AMI-01 www.icst.com/products/hiperclocks.html 3 REV. A DECEMBER 2, 2003 PRELIMINARY Integrated Circuit Systems, Inc. ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT Test Conditions Minimum Typical 2.18 50 TBD 20% to 80% 133MHz TBD TBD Maximum 250 Units MHz ns ps ps ps % % TABLE 4A. AC CHARACTERISTICS, VDD = VDDO = 3.3V5%, TA = 0C TO 70C Symbol Parameter fMAX tpLH Output Frequency Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2, 4 Par t-to-Par t Skew; NOTE 3, 4 Output Rise/Fall Time Output Duty Cycle tsk(o) tsk(pp) tR / tF odc 133MHz < 250MHz TBD NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. TABLE 4B. AC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 2.5V5%, TA = 0C TO 70C Symbol Parameter fMAX tpLH Output Frequency Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2, 4 Par t-to-Par t Skew; NOTE 3, 4 Output Rise/Fall Time Output Duty Cycle 20% to 80% 133MHz TBD TBD TBD TBD TBD Test Conditions Minimum Typical Maximum 250 Units MHz ns ps ps ps % % tsk(o) tsk(pp) tR / tF odc 133MHz < 250MHz TBD NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. 8302AMI-01 www.icst.com/products/hiperclocks.html 4 REV. A DECEMBER 2, 2003 PRELIMINARY Integrated Circuit Systems, Inc. ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT PARAMETER MEASUREMENT INFORMATION 1.65V5% 2.05V5% 1.25V5% VDD, VDDO SCOPE Qx VDD VDDO SCOPE Qx LVCMOS GND LVCMOS GND -1.65V5% -1.25V5% 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT V DD 3.3V/2.5V OUTPUT LOAD AC TEST CIRCUIT V Q CLK 2 V DDO DDO 2 V Q nQ V 2 DDO nQ DDO 2 2 t PD tsk(o) PROPAGATION DELAY PART 1 Q PART 2 Q nQ V V DD OUTPUT SKEW 80% 20% tR tF 80% 20% 2 V DDO 2 DDO Clock Outputs 2 tsk(pp) PART-TO-PART SKEW nQ VDDO VDDO 2 OUTPUT RISE/FALL TIME Q 2 t PW t PERIOD t PW t PERIOD odc = OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 8302AMI-01 www.icst.com/products/hiperclocks.html 5 REV. A DECEMBER 2, 2003 PRELIMINARY Integrated Circuit Systems, Inc. ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT RELIABILITY INFORMATION TABLE 5. JAVS. AIR FLOW TABLE FOR 8 LEAD SOIC JA by Velocity (Linear Feet per Minute) 0 Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 153.3C/W 112.7C/W 200 128.5C/W 103.3C/W 500 115.5C/W 97.1C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TRANSISTOR COUNT The transistor count for ICS8302I-01 is: 322 8302AMI-01 www.icst.com/products/hiperclocks.html 6 REV. A DECEMBER 2, 2003 PRELIMINARY Integrated Circuit Systems, Inc. ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT 8 LEAD SOIC PACKAGE OUTLINE - SUFFIX M FOR TABLE 6. PACKAGE DIMENSIONS SYMBOL N A A1 B C D E e H h L 5.80 0.25 0.40 0 1.35 0.10 0.33 0.19 4.80 3.80 1.27 BASIC 6.20 0.50 1.27 8 Millimeters MINIMUN 8 1.75 0.25 0.51 0.25 5.00 4.00 MAXIMUM Reference Document: JEDEC Publication 95, MS-012 8302AMI-01 www.icst.com/products/hiperclocks.html 7 REV. A DECEMBER 2, 2003 PRELIMINARY Integrated Circuit Systems, Inc. ICS8302I-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT Marking 302AI01 302AI01 Package 8 lead SOIC 8 lead SOIC on Tape and Reel Count 96 per tube 2500 Temperature -40C to 85C -40C to 85C TABLE 7. ORDERING INFORMATION Part/Order Number ICS8302AMI-01 ICS8302AMI-01T While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8302AMI-01 www.icst.com/products/hiperclocks.html 8 REV. A DECEMBER 2, 2003 |
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